The 74LS96 is a 5-bit shift register with both serial and parallel (ones transfer) data entry. Since the ’96 has the output of each stage available as well as a D-type serial input and ones transfer inputs on each stage, it can be used 5-bit serial- to-parallel, serial-to-serial and some parallel-to-serial data operations. The 74LS96 is five master/slave flip-flops connected to perform right shift. The flip- flops change state on the LOW-HIGH transition of the clock. The Serial (S) input is edge-triggered and must be stable only one set-up time before the LOW to HIGH clock transition.
Features:-
• 5-bit parallel-to-serial or serial-to-parallel converter
• Asynchronous transfer preset entry
• Buffered positive-triggered clock
• Buffered active LOW Clear
Specifications:-
| Symbol | Parameter | Values | Unit |
| VCC | Supply Voltage | 7 | V |
| VIN | Input Voltage | -0.5 to 7.0 | V |
| IIN | Input Current | -30 to 1 | m A |
| VOUT | Voltage applied to output in HIGH output State | -0.5 to Vcc | V |
| TA | Operating Free Air Temperature | 0 to 70 | °C |
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